@ARTICLE{Kropidłowski2019:5ebff3e1ad49b31ccec0e1ee,
	author="{Kropidłowski, Marek and Handkiewicz, Andrzej and Naumowicz, Mariusz and Szczęsny, Szymon}",
	title="{ADC based on a fully differential current mode integrator}",
	year="2019",
	type="artykuł naukowy",
	language="en",
	journal="{Analog Integrated Circuits and Signal Processing}",
	issn="0925-1030",
	volume="100",
	number="2",
	pages="327--334",
	doi="10.1007/s10470-019-01456-4",
	url="https://link.springer.com/article/10.1007/s10470-019-01456-4?wt_mc=Internal.Event.1.SEM.ArticleAuthorOnlineFirst&utm_source=ArticleAuthorOnlineFirst&utm_medium=email&utm_content=AA_en_06082018&ArticleAuthorOnlineFirst_20190428",
	keywords="Standard digital CMOS technology; Low power circuits; Analog to digital converters; Analog circuit design",
	abstract="{The paper presents current mode Analog to Digital Converters (ADC) for a standard digital CMOS technology in a nm scale. It is shown that such converters composed of a fully differential current mode integrator make it possible to achieve a several-bit resolution necessary for pipeline processing. The proposed fully differential structure provides a 1-bit higher resolution in comparison to a non-balanced structure. The goal of the paper is obtained without voltage increasing above the standard 1.2 V supply. The pipelined ADC, composed of two 5-bits converters, consumes 1.5 mW of power and its Walden figure-of-merit equals 104.34 fJ/conv.}",
}