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Article

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Title

Improving Characteristics of LUT-Based Three-Block Mealy FSMs’ Circuits

Authors

[ 1 ] Wydział Techniczny, Akademia im. Jakuba z Paradyża | [ P ] employee

Scientific discipline (Law 2.0)

[2.3] Information and communication technology

Year of publication

2022

Published in

Electronics

Journal year: 2022 | Journal volume: 11 | Journal number: 6

Article type

scientific article

Publication language

english

Keywords
EN
  • Mealy FSM; FPGA; LUT count; synthesis; complex state codes; structural decomposition
Abstract

EN One of the very important problems connected with FPGA-based design is reducing the hardware amount in implemented circuits. In this paper, we discuss the implementation of Mealy finite state machines (FSMs) by circuits consisting of look-up tables (LUT). A method is proposed to reduce the LUT count of three-block circuits of Mealy FSMs. The method is based on finding a partition of set of internal states by classes of compatible states. To reduce the LUT count, we propose a special kind of state code, named complex state codes. The complex codes include two parts. The first part includes the binary codes of a state as the element of some partition class. The second part consists of the code of corresponding partition class. Using complex state codes allows obtaining FPGA-based FSM circuits with exactly four logic blocks. If some conditions hold, then any FSM function from the first and second blocks is implemented by a single LUT. The third level is represented as a network of multiplexers. These multiplexers generate either additional variable encoding collections of outputs or input memory functions. The fourth level generates FSM outputs. An example of synthesis and experimental results is shown and discussed. The experiments prove that the proposed approach allows reducing hardware compared to such methods as auto and one-hot of Vivado, JEDI. Further, the proposed approach produces circuits with fewer LUTs than for three-level Mealy FSMs based on joint use of several methods of structural decomposition. The experiments show that our approach allows reducing the LUT counts on average from 11 to 77 percent. As the complexity of an FSM increases, the gain from the application of the proposed method grows; the same is true for both the FSM performance and power consumption

Pages (from - to)

950(1) - 950(29)

DOI

10.3390/electronics11060950

URL

https://www.mdpi.com/2079-9292/11/6/950

License type

CC BY (attribution alone)

Open Access Mode

open journal

Open Access Text Version

final published version

Release date

03.2022 (Date presumed)

Date of Open Access to the publication

at the time of publication

Ministry points / journal

100.0